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  this is information on a product in full production. december 2014 docid025842 rev 2 1/28 HDMI2C1-14HDS esd protection and signal conditioning for hdmi? 2.0 and hdmi? 1.4 source datasheet ? production data features ? hdmi compliant from -40 to 85 c ? 8 kv contact esd protection on connector side ? supports direct connection to low-voltage hdmi asic and/or cec driver (down to 1.8 v) ? tmds high bandwidth esd protection compatible with 4 k-2 k 60 fps. ? ddc (i2c) link protection, bi-directional signal conditioning circuit, and dynamic pull-up ? cec bus protection, bi-directional level-shifter, backdrive protection, and independent structure from main power supply ? heac link protection ? hpd pull down and signal conditioning ? short-circuit protection on 5 v output ? over temperature protection ? proposed in qfn 24 leads 500 m pitch benefits ? speed-up hardware design and certification of hdmi application ? pin map sequence compliant with hdmi connector type a ? minimal pcb footprint in consumer area ? ultra low power consumption in stand-by mode ? wake-up from stand-by through cec bus ? improved hdmi interface ruggedness and user experience ? long and/or poor quality cable support complies with the following standards ? hdmi standard ? iec 61000-4-2 level 4 ? jesd22-a114d level 2 applications ? consumer and computer electronics hdmi sink device such as: ? hd set-top boxes ? dvd and blu-ray disk systems ? notebook ? pc graphic cards hdmi ? : the hdmi logo and high definition multimedia interface are trademarks or registered trademarks of hdmi licensing llc. description the HDMI2C1-14HDS is a fully integrated esd protection and signal conditioning device for control links of hdmi transmitters (source). the HDMI2C1-14HDS is a simple solution that provides hdmi designers with an easy and fast way to reach full compliancy with the stringent hdmi cts on a wide temperature range. exposed thermal die 789101112 1 2 3 4 5 6 18 17 16 15 14 13 24 23 22 21 20 19 www.st.com
HDMI2C1-14HDS 2/28 docid025842 rev 2 contents 1 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 cec line description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 ddc bus description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.3 heac link and hpd line description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3.1 hpd line description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3.2 heac link . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 +5v protection and fault line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5 tmds channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 2.6 application block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5 recommendation on pcb assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.1 stencil opening design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.2 solder paste . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.3 placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.4 pcb design preference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.5 reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
docid025842 rev 2 3/28 HDMI2C1-14HDS functional description 28 1 functional description the HDMI2C1-14HDS is a fully integrated esd protection and signal conditioning device for control links and tmds data video channels of hdmi transmitters (source). the control stage provides a bidirectional buffer, integrating signal conditioning and dynamic pull-up on ddc bus for maximum system robustness and signal integrity. the heac (hdmi ethernet and audio return channels) function is supported, making the component fully compliant with hdmi version. a bidirectional cec block is integrated, able to wake-up the application from stand-by mode (all power supply off, except the cec power supply). the integrated tmds links esd protection allows a video data rate up to 10.2 gbps, corresponding to the maximal speed specified by the hdmi standard. all video format specified by hdmi standard (up to 1080p60) are supported, giving maximal flexibility to designers. the +5 v supplied to the cable is protected against accidental surge current and short circuit. all these features are provided in a single 24 leads qfn package saving space on the board. the HDMI2C1-14HDS is a simple solution that provides hdmi designers with an easy and fast way to reach full compliancy with the stringent hdmi cts on a wide temperature range. figure 1. pin out, top view gnd 789101112 1 2 3 4 5 6 18 17 16 15 14 13 24 23 22 21 20 19 hpd_ic sda_ic cec_ic scl_ic fault_ic dat_d2+ dat_d2- dat_d1+ dat_d1- dat_d0+ dat_d0- scl ck- ck+ nc sda vdd_5v 5v_out vdd_ic vdd_cec cec vddcecco hpd utility
application information HDMI2C1-14HDS 4/28 docid025842 rev 2 2 application information 2.1 cec line description the cec bus is described in the hdmi standards as the consumer electronics control. it provides control functions between all the various audiovisual equipment chained in the user's environment. the cec block integrated in the HDMI2C1-14HDS implements a level shifter, shifting the cable cec line from +3.3 v cec voltage (v dd_cec ) down to the asic power supply voltage (v dd_ic ) that can be as low as 1.8 v. the figure 2 shows the functional diagram of the integrated cec block. figure 2. cec link functional block diagram in case of no activity on the cec bus, or if the cec driver is off (v dd_cec = 0), the output cec pin is put in high impedance mode (open circuit) protecting the circuitry and the application against hazardous backdrive. the figure 3 illustrates the normal operating mode of the cec functional block when either the ic from the source on the sink drives the communication. figure 3. cec simplified cec_ic vdd_cec_ic cec vdd_cec vdd_cec_ic vdd_cec cec driver uvlo ctrl circuit enable 1 3 5 7 9 11 12 13 14 15 16 17 18 19 2 4 6 8 10 hdmi connector decoupling decoupling capacitance capacitance r pu_cec_ic hbm iec61000-4-2 r pu_cec_bus anti back drive diode cable side asic side v dd_cec_ic cec_ic v dd_cec cec v tdown_cec v tup_cec v hyst_cec v dd_cec_ic cec_ic v dd_cec cec v il_cec_ic v ih_cec_ic block in high impedance level shifting source ic drives sink drives through hdmi cable block in high impedance block in high impedance level shifting block in high impedance t t t t 10% 90% t fall_cec
docid025842 rev 2 5/28 HDMI2C1-14HDS application information 28 in case the application is set in stand-by mode, the +5 v main supply of the application is generally powered off in order to reduce as much as possible the global power consumption. the cec driver can be the only device still working in low power mode, allowing a wake up of the whole application through the cec line. when the main power supply +5 v is switched off, and if the cec bus is still active (v dd_cec power in on state), the HDMI2C1-14HDS keeps the cec bus working properly while all other outputs of the component are put in high impedance mode. the cec output (cable side) integrates a protection against esd which is compliant with iec61000-4-2 standard, level 4 (8 kv contact). 2.2 ddc bus description the ddc bus is described in the hdmi standards as the display data channel. the topology corresponds to an i2c bus that must be compliant with the i2c bus specification version 2.1 (january 2000). the ddc bus is made of 2 lines: data line (sda) and clock line (scl). it is used to create a point to point communication link from the source to the sink. eedid and hdcp protocols are especially flowing through this link, making this i2c communication channel a key element in the hdmi application. the ddc block integrated in the HDMI2C1-14HDS allows a bidirectional communication between the cable and the asic. it is fully compliant with the hdmi standard and its cts, and with the i2c bus specification version 2.1. it is shifting the 5 v voltage from the cable (v 5v_out ) down to the asic voltage level (v dd_ic ) that can be as low as 1.8 v. the figure 4 shows the functional diagram of the ddc block integrated in the HDMI2C1-14HDS device. figure 4. the ddc functional block diagram (scl and sda lines) the figure 5 illustrates the electrical parameters of the ddc block specified in ta b le 8 . scl_ic sda_ic vdd_ic reshaping circuit vdd_5v 5v_out scl sda vdd_ic hdmi asic +5v uvlo vdd_5v 5v_out enable drive hdmi connector decoupling capacitance 1 3 5 7 9 11 13 15 17 19 12 14 16 18 2 4 6 8 10 r pu_asic hbm r pu_bus iec61000-4-2 dynamic pull -up
application information HDMI2C1-14HDS 6/28 docid025842 rev 2 figure 5. simplified view of the electrical parameters of the ddc functional block the hdmi standard specifies that the max capacitance of the cable can reach up to 700 pf. knowing that the max capacitance of the sink input can reach up to 50 pf, this means that the i2c driver must be able to drive a load capacitance up to 750 pf. on the other hand, the i2c standard specifies a maximum rise time of the signal must be lower than 1 s in order to keep the signal integrity. taking into account the max cable capacitance of 750 pf, it is not possible to guarantee a rise time lower than 1 s in worst case. therefore, a dynamic pull- up has been integrated at the output of sda and scl lines and synchronized with the i2c driver. this signal booster accelerates for a short period the charging time of the equivalent cable capacitance, allowing driving any hdmi cable. the figure 6 illustrates the benefit of the dynamic pull-up integrated in the HDMI2C1-14HDS device. 5v_out sda v dd_ic sda_ic v tdown_ic t rise_bus v tup_ic 70% 30% v tdown_bus v tup_bus v hyst_bus ic drives asic side cable side cable drives t fall_bus t t
docid025842 rev 2 7/28 HDMI2C1-14HDS application information 28 figure 6. benefit of the dynamic pull-up on the ddc bus in order to activate the ddc lines, the v dd_5v has to reach the v dd_on threshold (see table 4 ). the inputs and outputs of the bidirectional level shifters (sda, scl, sda_ic, scl_ic) must be set to a high level after the power-on, and the hpd line has to be activated on time. the ddc outputs (scl and sda on cable side) integrate a protection against esd which is compliant with iec61000-4-2 standard, level 4 (8kv contact). r pu_bus 5v_out 750pf dynamic pull -up hdmi? cable model signal on the cable ic control 5v_out 5v_out v v dd_ic dd_ic ic control signal on the cable rise time out of i2c specification risk of communication failure rise time compliante with i2c specification signal integrity even on 750 pf load capacitance i2c driver without dynamic pull-up i2c driver with dynamic pull-up r pu_bus 5v_out hdmi? cable model 750pf logical circuitry synchronized with i2c bus
application information HDMI2C1-14HDS 8/28 docid025842 rev 2 2.3 heac link and hpd line description the HDMI2C1-14HDS proposes a unique solution in order to manage and protect both the heac and the hpd links. the figure 7 shows an overview of the function diagram of the integrated block. figure 7. heac / hpd / utility functional block diagram this block simplifies the design and the pcb layout of the hpd and heac functions. both hpd and utility inputs (cable side) integrate a protection against esd which is compliant with iec61000-4-2 standard, level 4 (8 kv contact). 2.3.1 hpd line description the hpd line is described in the hdmi standard as the hot plug detect function. this line is used by the source device in order to detect if a sink device is connected through an hdmi cable. the integrated hpd block is pulling down the line via a current source. when the input voltage is detected to be higher than a threshold level v th_hpd , the signal is converted into a high state level on the asic side, at the voltage level of the asic power supply v dd_ic . otherwise, cec_ic pin remains in low state. the electrical parameters relevant to the hpd block and specified by the table 7 are illustrated in the figure 8 . hpd hpd_ic utility hdmi asic or ic vdd_ic matching utility / heac+ hpd / heac- vdd_ic hdmi connector 1 3 5 7 9 11 13 15 17 19 12 14 16 18 2 4 6 8 10 iec61000-4-2 iec61000-4-2 hbm decoupling capacitance
docid025842 rev 2 9/28 HDMI2C1-14HDS application information 28 figure 8. simplified view of the electrical parameters of the hpd block 2.3.2 heac link the heac link is described in the hdmi 1.4 standards as the hdmi ethernet and audio return channel. it corresponds physically to one differential wired pair made of the utility line and the hpd line. two signals are transmitted through this link. the first signal corresponds to the hdmi ethernet channel (hec). the signal is transmitted in differential mode (bidirectional) through the heac link. it is specified by the 100base-tx ieee 802.3 standard (fast ethernet 100mbps over twisted pair). therefore, the hec integrates an ethernet link into the video cable, enabling ip-based applications over the hdmi cable. the second signal corresponds to the audio return channel (arc). the signal is transmitted in common mode (unidirectional, from sink to source) through the heac link. it is specified by the iec 60958-1 standard. the arc function integrates an upstream audio capability, simplifying the cabling of the audiovisual equipment. it is no more necessary to use a coaxial cable from tv to audio amplifier. the HDMI2C1-14HDS helps the designer to implement this high added value heac function in the application, protecting the link against the esd with no disturbance of the signal. 2.4 +5v protection and fault line the +5 v power supply that the source device has to provide to the hdmi cable is described by the hdmi standard. it must be protected against accidental short circuit that could occur on the cable side. the HDMI2C1-14HDS device embeds a low drop current limiter. if an overcurrent is detected, the HDMI2C1-14HDS limits the current through the +5 v power supply. if the current is too high (short circuit), the device opens the +5 v. furthermore, the HDMI2C1-14HDS device embeds also an over temperature protection (otp). if the internal temperature of the device is reaching a too high value, the +5 v supply is even opened in order to protect the application. hpd_ic signal signal on hpd link v il_hpd 5 v v dd_ic
application information HDMI2C1-14HDS 10/28 docid025842 rev 2 in case either the current limiter or the otp is triggered, the fault pin switches down to a low state level (open drain topology) in order to inform the hdmi asic that an abnormal situation has been detected (option). an under voltage lockout (uvlo) is also integrated in the block. it checks the main +5 v power supply state, and enable the +5v_out only if the main power supply has reach a minimal value v dd_5v_on . the figure 9 shows the functional diagram of the current limiter block. figure 9. +5v functional block diagram to summarize, the short circuit protection an d the over temperature protection features are providing a high robustness level of the application. on top of this, the fault line feature can be used in order to improve the user experience. the 5v_out pin integrates a protection against esd which is compliant with iec61000-4-2 standard, level 4 (8 kv contact). the decoupling capacitance is mandatory, according to the power management state of the art. vdd_5v +5v_out ctrl 5v fault hdmi asic or ic vdd_ic uvlo current sensor otp r pu_fault hdmi connector low drop current limiter decoupling decoupling capacitance capacitance hbm hbm iec61000-4-2 1 3 5 7 9 11 13 15 17 19 12 14 16 18 2 4 6 8 10
docid025842 rev 2 11/28 HDMI2C1-14HDS application information 28 2.5 tmds channels the tmds (transient minimized differential signaling) channels are described by the hdmi standard. a total of 4 unidirectional differential pairs are used to transmit the video data to the sink device. there are 3 channels dedicated to the video data, and 1 channel dedicated to the clock. the frequency of the tmds clock is 1/10 of the video data frequency. the HDMI2C1-14HDS provides a simple pcb layout solution, directly compliant with hdmi connector type a. it protects the application against the esd according the iec61000-4-2 level 4 standard (+/-8 kv contact). the high bandwidth of this esd protection allows to transmit hd video data with no disturbance of the signal up to 3.4gbps per channel. figure 10. tmds lines esd protection functional diagram 2.6 application block diagrams the figure 11 shows an application block diagram proposal implementing all the possible options. the diagram shows that the cec driver can be totally independent from the hdmi asic. by this way, even if the +5 v power supply and/or if the hdmi asic is sleeping in stand-by mode, the cec bus is still active in low power mode. by this way, the designer has then the tools to optimize the power consumption of the global application in stand-by mode, and in the same time, has th e possibility to implement a smart wake-up through the cec bus enhancing the final user experience. dat_d2+ dat_d2- dat_d1+ dat_d1- dat_d0+ dat_d0- dat_clk- dat_clk+ 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 hdmi connector iec61000-4-2
application information HDMI2C1-14HDS 12/28 docid025842 rev 2 figure 11. application block diagram note: scl_ic, sda_ic, and cec_ic have to be driven with an asic working with open drain outputs. table 1. block diagrams references ref. typical values comment r1 27 k pull-up resistance on cec bus, specified by the hdmi standard r2, r3 1.8 k pull-up resistances on ddc bus, specified by the hdmi standard r4, r5 10 k pull-up resistance on ddc bus, asic side, value selected to be compliant with i2c levels r6 270 k to 1 m pull-up resistance on cec line, asic side r7 10 k pull-up resistance on fault line (option) d1 bat54 small schottky diode blocking backdrive current flowing toward the v dd_cec supply c1 to c5 100 nf decoupling capacitance on power supplies cec driver +5v scl_ic sda_ic sda scl cec bus vdd_cec_ic vdd_ic vdd_ic 4 tmds channels 8 lines vdd_cec vdd_5v vdd_ic fault hpd_ic vdd_cec_ic cec_ic 5v_out hpd sda scl cec vdd_cec utility vdd_ic hpd ddc data hpd / heac tmds data2+ tmds data2- tmds data1+ tmds data1- tmds data0+ tmds data0- tmds clock+ tmds clock- - utility / heac+ over current detect heac- heac+ HDMI2C1-14HDS hdmi asic hdmi connector +5v power c4 c3 r2 r3 c2 r1 d1 c1 c5 r6 r4 r5 ddc clock r7 gnd tmds lines
docid025842 rev 2 13/28 HDMI2C1-14HDS application information 28 figure 12. pin numbering table 2. pin description pin name description pin name description 1 fault_ic fault line output asic side 13 dat_d0- tmds data d0- 2 cec_ic cec output asic side 14 dat_d0+ tmds data d0+ 3 scl_ic ddc output asic side 15 dat_d1- tmds data d1- 4 sda_ic sda output asic side 16 dat_d1+ tmds data d1+ 5 hpd_ic hpd output asic side 17 dat_d2- tmds data d2- 6 utility utility/heac+ input hdmi cable side 18 dat_d2+ tmds data d2+ 7hpd hpd/heac- input hdmi cable side 19 cec cec output hdmi cable side 8 sda ddc output hdmi cable side 20 vdd_cec_con cec con supply hdmi cable side 9 scl ddc output hdmi cable side 21 5v_out +5 v power supply hdmi cable side 10 ck- tmds ck+ 22 vdd_5v +5 v main power supply 11 ck+ tmds ck- 23 vdd_cec cec supply hdmi cable side 12 nc none connected 24 vdd_ic hdmi asic power supply gnd 789101112 1 2 3 4 5 6 18 17 16 15 14 13 24 23 22 21 20 19 hpd_ic sda_ic cec_ic scl_ic fault_ic dat_d2+ dat_d2- dat_d1+ dat_d1- dat_d0+ dat_d0- scl ck- ck+ nc sda vdd_5v 5v_out vdd_ic vdd_cec cec vddcecco hpd utility
electrical characteristics HDMI2C1-14HDS 14/28 docid025842 rev 2 3 electrical characteristics table 3. absolute maximum ratings (limiting values) symbol parameter test conditions value unit v pp_bus esd discharge on hdmi cable side (pin 6 to 11, pin 13 to 19 and pin 21), iec 61000-4-2 level 4 contact discharge 8 (1) kv v pp_ic esd discharge (all pins), hbm jesd22-a114d level 2 contact discharge 2 kv t stg storage temperature range -55 to +150 c t op operating temperature range -40 to +85 c t l maximum lead temperature 260 c v dd_5v v dd_ic v dd_cec v dd_cec_ic supply voltages 6 v inputs logical input min/max voltage range -0.3 to 6 v 1. with a 100 nf capacitor connected to the 5v_out pin. table 4. power supply characteristics (t amb = 25 c) symbol parameter test conditions min. typ. max. unit v dd_cec cec supply voltage, bus side 2.97 3.3 3.63 v v dd_cec_ic cec supply voltage, ic side 1.62 3.63 v v dd_ic low-voltage asic supply voltage 1.62 3.63 v v dd_5v 5 v input supply voltage range 4.9 5.0 5.3 v v dd_5v_on (1) +5 v power on reset 3.5 3.8 4.1 v v dd_cec_on cec power on reset 2.6 2.8 2.95 v i qs_5v quiescent currents on v dd_5v , v dd_ic , v dd_cec , v dd_cec_ic v dd_5v = 5v, v dd_ic = 1.8v, v dd_cec = 3.3v v dd_cec_ic = 1.8v idle-state on cec and ddc links, hpd and 5v_out links open 600 a i qs_ic 75 i qs_cec 200 i qs_cec_ic 40 rth junction to ambient thermal resistance copper heatsink as shown by figure 18 75 c/w t sd thermal shutdown threshold 120 150 c p total_sb standby conditions v dd_5v = v dd_ic = 0v v dd_cec = 3.3v v dd_cec_ic = 3.3v 0.8 mw 1. in order to activate the ddc functional block, the 3 following conditions have to be met: - v dd_5v has to reach the v dd_on threshold - the inputs and outputs of the bidirectional level shifter must be set to a high level after the power-on - the hpd line has to be activated one time
docid025842 rev 2 15/28 HDMI2C1-14HDS electrical characteristics 28 table 5. cec electrical characteristics (1) symbol parameter test conditions min. typ. max. unit v tup_cec upward input voltage threshold on bus side 2.0 v v tdown_cec downward input voltage threshold on bus side 0.8 v v hyst_cec input hysteresis on bus side 0.4 v t rise_cec output rise-time (10% to 90%) rup_cec = 14.1 k ? (2) c cec_cable = 7.9 nf (2) 250 s t fall_cec output fall-time (90% to 10%) 50 s i off_cec leakage current in powered-off state v dd_5v = 0 v v dd_ic = 0 v, v dd_cec = 3.3 v 1.8 a v il_cec_ic input low level on ic side 0.5 v v ih_cec_ic input high level on ic side v ih_cec_ic = 1.8 v 1.5 v v ih_cec_ic = 3.3 v 1.9 r on_cec on resistance across cec and cec_ic pins cec pin to 0 v 100 ? c in_cec input capacitance on cec link v dd_5v = 0 v v dd_cec = 0 v v dd_ic = 0 v v bias = 0 v, f = 1 mhz, v osc = 30 mv 25 30 (3) pf 1. t amb = 25 c, v dd_cec = 3.3 v, v dd_cec_ic = 1.8 v, unless otherwise specified 2. test conditions are compliant with worst case cec specification: - pull up resistance 2 times 27 k ? +5% in parallel - max capacitance corresponding to 9 equipment chained on the cec bus 3. maximum capacitance allowed at connector output is 200 pf in hdmi specification table 6. hdmi 5v_out current limiter electrical characteristics (1) symbol parameter test conditions value unit min. typ. max. v drop drop-out voltage i 5v_out = 55 ma 20 50 95 (2) mv i 5v_out output current (3) v 5v_out = 0 v 55 115 ma v l_fault low level on fault pin r pu_fault = 10 k ? 0.3 v 1. t amb = 25c, v dd_5v = 5 v, unless otherwise specified 2. hdmi specification requires a maximum of 100 mv voltage-drop 3. maximum allowed output current is 500 ma when a sink is powered off in hdmi specification
electrical characteristics HDMI2C1-14HDS 16/28 docid025842 rev 2 table 7. hpd, heac, and utility line electrical characteristics (1) symbol parameter test conditions value unit min. typ. max. i pull_down pull-down current in hpd block 15 25 a v th_hpd hpd input threshold level 1.0 1.7 v c in_hpd c in_utility input capacitance v dd_5v = 0 v, v bias = 0 v f = 1 mhz, v osc = 30 mv 21 25 pf f cut_heac cut-off frequency of heac bus 500 mhz 1. tamb = 25c, v dd_5v = 5 v, unless otherwise specified. table 8. ddc bus (sda and scl lines) electrical characteristics (1) symbol parameter test conditions value unit min. typ. max. v tup_bus upward input voltage threshold on bus side 3.5 v v tdown_bus downward input voltage threshold on bus side 1.5 v v hyst_bus input hysteresis on bus side 1.0 1.3 v v ol_bus output low level current sunk by sda and scl pin is 3 ma 0.35 v t rise_bus output rise-time (30% to 70%) c bus = 750 pf (2) r up = 2 k ? //47 k ? + 10% (3) 500 ns t fall_bus output fall-time (30% to 70%) 50 ns v tup_ic upward input voltage threshold on ic side 55 60 65 %v dd_ic v tdown_ic downward input voltage thresholds ic side 35 40 45 %v dd_ic v ol_ic output low level on ic side current sunk by sda_ic or scl_ic pins is 500 a 20 %v dd_ic c in_ddc input capacitance on ddc link v dd_5v = 0 v v dd_ic = 0 v v dd_cec = 0 v v bias = 0 v, f = 1 mhz v osc = 30 mv 27 32 (4) pf 1. t amb = 25 c, v dd_5v = 5 v, v dd_ic = 1.8 v, unless otherwise specified 2. maximum load capacitance allowed on i2c entire link (cable + connector) is 750 pf in hdmi specification. 3. two pull-up resistors in parallel (sink + source). typical value is 47 k ? and maximum value is 47 k ? + 10% in hdmi specification. 4. maximum capacitance allowed at connector output is 50 pf in hdmi specification
docid025842 rev 2 17/28 HDMI2C1-14HDS electrical characteristics 28 table 9. tmds links electrical characteristics (1) symbol parameter test conditions min. typ. max. unit f cut_tmds bandwidth at -3 db single ended mode 8.7 (2) ghz differential mode 6 v br breakdown voltage i rm = 1 ma 4.5 v i rm leakage current v rm = 3.3 v 100 na c i/o_gnd capacitance i/o to ground v i/o = 0 v, f = 1 mhz, v osc = 30 mv 0.6 1.0 pf c i/o_i/o capacitance i/o to i/o v i/o = 0 v, f = 1 mhz, v osc = 30 mv 0.3 pf z diff differential impedance tr = 200 ps (10%-90%) z0 diff = 100 ? 85 100 115 ? 1. t amb = 25 c, v dd_cec = 3.3 v, v dd_cec_ic = 1.8 v, unless otherwise specified 2. the bandwidth is enough large to operate up to 340 mhz for hdmi clock frequency (10.2gbps total data rate)
electrical characteristics HDMI2C1-14HDS 18/28 docid025842 rev 2 figure 13. cec typical waveforms (ic to cable communication) figure 14. cec typical waveforms (cable to ic communication) figure 15. ddc typical waveforms (ic to cable communication) c3 = 500 mv/div rise = 459.98 s fall = 2.34 s c2 = 1.00 v/div 200 s/div top = 3.29 v base = -12.0 mv c3 = 500 mv/div rise = 120.02 s fall = 966.6 ns c2 = 1.00 v/div 200 s/div top = 1.80 v base = 31.0 mv c3 = 500 mv/div fall = 78.07 ns c2 = 1.00 v/div 2 s/div top = 4.99 v base = 90.0 mv rise = 454.8 ns
docid025842 rev 2 19/28 HDMI2C1-14HDS electrical characteristics 28 figure 16. ddc typical waveforms (cable to ic communication) figure 17. hpd typical waveforms (timing) figure 18. heac single ended mode typical bandwidth c3 = 500 mv/div fall = 1.97 ns c2 = 1.00 v/div 2 s/div top = 1.80 v base = 17.8 mv rise = 1.25 s c3 = 500 mv/div fall = 9.47 ns c2 = 1.00 v/div 1 s/div top = 1.80 v base = -6.8 mv rise = 37.83 ns db 100k 1m 10m 100m 1g 10g -1 2 -11 -1 0 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 heac+ heac - f(hz)
electrical characteristics HDMI2C1-14HDS 20/28 docid025842 rev 2 figure 19. tmds line s 21 frequency response figure 20. tdr of tmds lines figure 21. eye diagram of tmds line: d0, d1, d2 and clk lanes at 3.35gbps 100k 1m 10m 100m 1g 10g -6 -5 -4 -3 -2 -1 0 clk- clk+ d0- d0+ d1- d1+ d2- d2+ f(hz) db pcb+hdmi2c1 - 14hds dat2 lane board alone 250mv/div 49.8ps/div
docid025842 rev 2 21/28 HDMI2C1-14HDS electrical characteristics 28 figure 22. eye diagram of tmds line: d0, d1, d2 and clk lanes at 3.35gbps figure 23. tmds line: remaining voltage when positive 8 kv esd applies figure 24. tmds line: remaining voltage when negative esd applies board + HDMI2C1-14HDS 250mv/div 49.8ps/div 50 v/div 16 v 4 v : esd peak voltage pp v :clamping voltage at 30 ns cl v :clamping voltage at 60 ns cl v :clamping voltage at 100 ns cl 1 2 3 4 20 ns/div 160 v 1 33 v 2 18 v 3 50 v/div -9 v -2 v 4 3 20 ns/div v : esd peak voltage pp v :clamping voltage @ 30 ns cl v :clamping voltage @ 60 ns cl v :clamping voltage @ 100 ns cl 1 2 3 4 -23 v 2 -173 v 1
package information HDMI2C1-14HDS 22/28 docid025842 rev 2 4 package information ? epoxy meets ul94, v0 ? lead-free packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. figure 25. qfn definitions b b e2 e e l l d2 e d k k a a a1 a1
docid025842 rev 2 23/28 HDMI2C1-14HDS package information 28 figure 26. pcb footprint recommendation (dimensions in mm) table 10. qfn dimension values ref dimensions millimeters inches min. typ. max. min. typ. max. a 0.80 0.90 1.00 0.031 0.035 0.039 a1 0.00 0.02 0.05 0.000 0.000 0.002 b 0.18 0.25 0.30 0.007 0.009 0.011 d 4.00 bsc 0.157 e 4.00 bsc 0.157 e 0.50 bsc 0.020 k 0.15 0.100 0.106 0.110 d2 2.55 2.70 2.80 0.100 0.106 0.110 e2 2.55 2.70 2.80 0.006 l 0.30 0.40 0.50 0.011 0.0157 0.0196       
package information HDMI2C1-14HDS 24/28 docid025842 rev 2 figure 27. marking specification figure 28. tape and reel specification ccc g 14hds y ww e4 ccc: country of origin y: assy year w w: assy week user direction of unreeling all dimensions are typical values in mm 4.0 8.0 4.35 4.35 2.0 16.0 1.75 8.5 0.25 ? 1.5  1.5  1.5 1.10 0.30
docid025842 rev 2 25/28 HDMI2C1-14HDS recommendation on pcb assembly 28 5 recommendation on pcb assembly 5.1 stencil opening design 1. general recommendation on stencil opening design a) stencil opening dimensions: l (length), w (width), t (thickness). figure 29. stencil opening dimensions b) general design rule stencil thickness (t) = 75 ~ 125 m 2. reference design a) stencil opening thickness: 100 m b) stencil opening for leads: opening to footprint ratio is 90%. figure 30. recommended stencil window position l t w aspect ratio w t ----- 1.5 = aspect area lw 2t l w + () --------------------------- - 0.66 = 2.7 mm 2.7 mm 0.60 mm 4.4 mm 4.4 mm 0.5 mm stencil window footprint 0.25 mm 237 m 250 m 570 m 1.9 mm 2.7 mm 600 m
recommendation on pcb assembly HDMI2C1-14HDS 26/28 docid025842 rev 2 5.2 solder paste 1. use halide-free flux, qualification rol0 according to ansi/j-std-004. 2. ?no clean? solder paste recommended. 3. offers a high tack force to resist component displacement during pcb movement. 4. use solder paste with fine particles: powder particle size 20-45 m. 5.3 placement 1. manual positioning is not recommended. 2. it is recommended to use the lead rec ognition capabilities of th e placement system, not the outline centering. 3. standard tolerance of 0.05 mm is recommended. 4. 3.5 n placement force is recommended. too much placement force can lead to squeezed out solder paste and cause solder joints to short. too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. to improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. for assembly, a perfect supporting of the pcb is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. 5.4 pcb design preference 1. to control the solder paste amount, closed vias are recommended instead of open vias. 2. the position of tracks a nd open vias in the solder area should be well balanced. symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. 5.5 reflow profile figure 31. st ecopack ? recommended soldering reflow profile for pcb mounting note: minimize air convection currents in the reflow oven to avoid component movement. 250 0 50 100 150 200 240 210 180 150 120 90 60 30 300 270 - 6c/s 240-245 c 2 - 3 c/s temperature (c) -2 c/s -3 c/s time (s) 0.9 c/s 60 sec (90 max)
docid025842 rev 2 27/28 HDMI2C1-14HDS ordering information 28 6 ordering information figure 32. ordering information scheme 7 revision history table 11. ordering information order code marking package weight base qty delivery mode HDMI2C1-14HDS 14hds qfn_24l 44 mg 4,000 tape and reel hdmi2c 1 - 14 hds hdmi and i2c compliant links number of protected links 14 lines protected according to iec 6100-4-2 version hsd: hd1080p supported hdmi port type 1: source ports table 12. document revision history date revision changes 25-jul-2014 1 initial release 10-dec-2014 2 updated figure 26 .
HDMI2C1-14HDS 28/28 docid025842 rev 2 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics ? all rights reserved


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